Authors:
Anil Seker,BernaOrsYalcin,DOI NO:
https://doi.org/10.26782/jmcms.spl.6/2020.01.00003Keywords:
Custom instruction,FPGA,HOG,hardware accelerator,Abstract
Human detection is one of the hot topic in the field of computer vision. HOG descriptor is a widely accepted local feature extractor with high accuracy and it has heavy computation blocks in processing. Therefore, its application takes a long processing time. To improve execution time of algorithm, one of the methods is hardware acceleration. In this paper, we propose an application-specific HOG descriptor architecture on FPGA with a soft processor called as Nios II. It has the ability of instruction set extension to its base micro-architecture without any modification on the core. We select HOG specific custom instruction sets to extend. To obtain custom instruction set, we used DAG representation which is generated by LLVM compiler. The algorithm is applied on the only-processor architecture and on the proposed architecture with instruction set extension. The total execution time is measured using hardware clock counter to approximate real time consumption. The results of both architecture are compared in terms of clock count. Obviously, proposed architecture which has fully floating-point calculation is accelerated 17.68 times in comparison with pure software implementation of HOG descriptor. The implementation of the architecture is applied for 640x480x8bit test frame on lowcost Cyclone V FPGA platform.Refference:
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