Authors:
Gyan Prabhakar,Rajendra Pratap,R.K. Singh,Abhiskek Vikram,DOI NO:
https://doi.org/10.26782/jmcms.2020.01.00005Keywords:
Charge Pump,Ring Oscillator,NOC clock generator,clocked D-FF,CMLS level shifter,Abstract
This paper proposes the design strategy of low power Dickson charge pump using associated block who is help in proper functionality at full chip level because of single charge circuit cannot be design for portable handheld based application. When a low power optimization based high speed charge pump circuit is designed at system level, then entire circuit block operates at different supply voltage so it requires. For this, the circuit designer needs a level shifter to manage the dual supply voltage and provide a non-overlapping ring oscillator to provide the clock to the circuit to operate at high speed. CMOS clocked circuit is required to work in sufficient voltage level pushup up to end level. Thus, In this paper, the actual simulation results using the CMOS 180nm technology along with each block are shown. Along with this, good brief discussion on each block has also been done.Refference:
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